Advanced Package Technologies for High-Performance Systems

Microelectronic packages continue to undergo significant changes to keep pace with the demands of highperformance silicon. From the traditional role of space transformation and mechanical protection, packages have evolved to be a means to cost-effectively manage the increasing demands of power delivery, signal distribution, and heat removal. In the last decade or so, increasing frequency and power levels coupled with lower product costs have been driving new package technologies. Some examples of this are the migration from wirebond to flip chip interconnect and ceramic to organic package substrates. Recently, architectural changes like the introduction of multicore processors, material changes such as the low-K dielectrics on the silicon, and lead-free second-level interconnects have introduced a new set of challenges that require innovative package technology solutions. As we look forward, increased levels of current, increased power density, and high-bandwidth signaling are expected to create challenges in all disciplines within the package field. In addition to these technical challenges, market forces such as declining computer prices, increased user experience through miniaturized devices, wireless connectivity, and longer battery life would make these challenges even more complex. In this paper we provide an overview of trends and challenges in the areas of power delivery, signal transfer, thermal management, miniaturization, and wireless package technologies. We also examine some of the potential solutions that are being developed to meet these challenges. INTRODUCTION Forty years of improvements in electronic components driven by Moore’s Law has made almost all electronic systems relatively high performance when compared to the systems of a few years past. Even many low-cost children’s toys today have computing power that exceeds the power of the earliest Personal Computers (PCs). In this paper, however, we limit the scope of our discussion to advanced package technologies used in consumer and business computing devices such as mobile and desktop PCs as well as workstations and servers. Some of the key components in such systems that drive the use of state-ofthe-art package technologies are the microprocessors, chipsets, and WLAN components. The evolution of packages for the desktop PC is shown in Figure 1. In the early 1980s, the 8086 microprocessor chip was housed in a Ceramic Dual In-line Package (CDIP). It used wirebonds to interconnect the silicon chip to the conducting leads on the ceramic package. This 800 mm package had 40 leads placed along its two long sides. With an operating frequency of only a few MHz, fewer than ten percent of the leads were needed to supply power to the chip allowing the majority of the leads to do the useful function of signal transfer in and out of the microprocessors. The primary function of this package was to provide space transformation and environmental protection. By 1994, the Pentium Pro processor used a 3000mm Ceramic Pin Grid Array (CPGA) package with ® Pentium is a registered trademark of Intel Corporation and its subsidiaries in the United States and other countries. Intel Technology Journal, Volume 9, Issue 4, 2005 Advanced Package Technologies for High-Performance Systems 260 387 pins, a large copper-tungsten heat slug and two chips– the CPU chip and a separate large SRAM cache chip. Over 40% of the pins were dedicated to deliver power to the chips. By the mid-1990s, cost and conductor resistance of the ceramic packages drove another shift in package technology. CPU packages for desktop PCs migrated to Plastic Pin Grid Array (PPGA) that changed the substrate material but continued to use wire bonding for the firstlevel interconnection. The wire inductance, and the need to have the interconnect pads near the periphery of the chip, significantly degraded the quality of power delivery and limited the chip size shrink. By 1997, advanced processors such as the Pentium III processor migrated to flip chip BGA and PGA packages. In 2004, the Flip Chip Land Grid Array (FCLGA) package was introduced to eliminate the fragile package pins and enable the secondlevel interconnect pitch shrink for socketed components. Figure 1: Evolution of Desktop PC package All of these package changes occurred in an environment of shrinking computer costs (Figure 2). The cost, performance, and form-factor optimizations for different market segments that drove the evolution of package technologies described here also drove many other technologies that are not covered here due to space limitations. Examples of such packages are Single Edge Contact Cartridges (SECC), Organic BGA on socket mountable interposer packages, Tape Carrier Packages (TCP), singleand multi-layer Quad Flat Pack (QFP) packages, etc.  Pentium is a registered trademark of Intel Corporation and its subsidiaries in the United States and other countries. $600 $700 $800 $900 $1,000 $1,10